Such an integrator is generally known in the art and a problem therewith is to linearize its output-current versus input-voltage characteristic. This characteristic is a function of the transconductance Gm of the integrator and has to stay linear over the whole tuning range. The linearization is generally obtained by suppressing the non-linear components of the first active devices or by using degeneration techniques. On the one hand, it is well known that suppression requires accurate components matching perfectly and is thus not easy to realize in practice. On the other hand, degeneration techniques consist of using linear passive resistors as resistive means and gives good linearity. However, since the integrator is built in an electronic chip, on-chip resistors are subjected to temperature drifts and are process dependent. As result, it is again not easy to obtain a linear integrator only by adjusting the value of the resistive means. Therefore, only non time-continuously tuned integrators based on this technique are available up to now.
Such a non time-continuous integrator is for instance known from the article "Very high linearity tunable OTA in 5 V CMOS"; by A. M. Durham et al, published in the IEE PROCEEDINGS-G, Vol. 140, No. 3, JUNE 1993, pages 207 to 210. Therein, a solution is disclosed to tune the Gm value of a source degeneration integrator by using a switchable current mirror controlled by digital words. A lot of overhead is needed to perform the tuning because of the high amount of digital words used, and both the tuning range and the accuracy thereof are limited by the number of bits used in each digital word.